% -*- coding: utf-8 -*-

\begin{lstlisting}
static int opcode_adc(uint16_t opcode, uint16_t insn)
{
    uint8_t  dd, rr;
    int8_t  R, Rd, Rr;

    // 0001 11rd dddd rrrr
    dd = ((insn >> 4) & 0x1f);
    rr = ((insn >> 5) & 0x10) | (insn & 0x0f);
    HW_DMSG_DIS("%s r%d,r%d\n",OPCODES[opcode].name, dd, rr);

    Rd = MCU_REGS[dd];
    Rr = MCU_REGS[rr];
    R = Rd + Rr + READ_C;
    MCU_REGS[dd] = R;

    WRITE_H(((BIT3_(Rd)) & (BIT3_(Rr))) | ((BIT3_(Rr)) & (BIT3n(R))) | ((BIT3n(R)) & (BIT3_(Rd))));
    WRITE_N(BIT7_(R));
    WRITE_V((BIT7_(Rd) & BIT7_(Rr) & BIT7n(R)) | (BIT7n(Rd) & BIT7n(Rr) & BIT7_(R)));
    WRITE_Z(R == 0);
    WRITE_S(READ_N ^ READ_V);
    WRITE_C(((BIT7_(Rd)) & (BIT7_(Rr))) | ((BIT7_(Rr)) & (BIT7n(R))) | ((BIT7n(R)) & (BIT7_(Rd))));

    ADD_TO_PC(1); // PC is aligned on words
    SET_CYCLES(1);
    return opcode;
}
\end{lstlisting}
